Integrated circuits are formed on semiconductor substrates, or wafers. The wafers are then sawed into microelectronic dies (or “dice), or semiconductor chips, with each die carrying a respective integrated circuit. Each semiconductor chip is mounted to a package, or carrier substrate, which is often mounted to a motherboard and installed in various electronic systems.
In recent years, reduced surface field (RESURF) structures have become commonly used in power devices which are often used in power integrated circuits. The RESURF structure is known to provide an improved trade-off between voltage blocking capability and low specific on-resistance for the device when compared to the conventional counterpart. One of the constant ongoing struggles in field of power integrated circuits is to improve this trade-off which enables circuit designers to reduce the size of power devices and thus the size of the overall integrated circuit. Poor voltage blocking performance in a power device is often compounded by the high concentration of dopants used in the various regions of the device, and when a high voltage (e.g., between 80 and 100 volts) is applied to the device, leakage current is dramatically increased due to the enhancement in electric field near the heavily doped junctions. Such current is often referred to as “avalanche” current, and can significantly degrade the power device performance. Typically, any modifications in the device structure to improve its voltage blocking performance almost always results in degradation in its operational on-resistance.
Accordingly, it is desirable to provide a RESURF structure with reduced resistance without adversely affecting the voltage blocking capability of the device. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.